Fast and Guaranteed C Compilation onto the PACT-XPP? Reconfigurable Computing Platform
نویسندگان
چکیده
New reconfigurable computing platforms [1] are being introduced to overcome some of the deficiencies of microprocessor-based architectures and fine-grained reconfigurable devices (e.g., FPGAs). One of the new promising architectures is the eXtreme Processing Platform (XPP) [2][3]. It was designed to provide high-performance for stream-based computations and for a broad range of applications exhibiting high degrees of parallelism. The XPP consists of a 2-D coarse-grained array of adaptive processing elements (capable to perform typical ALU operations and other special operations), a number of internal RAMs and an on-chip configuration cache and manager (see Fig. 1(e)). XPP’s execution model is based on eventand datadriven mechanisms. The array processing elements (PEs) and the interconnection resources are self-synchronized and work at a fixed clock frequency. In addition, the XPP supports sophisticated runtime and partial reconfiguration mechanisms. A structural language called Native Mapping Language (NML) and a set of tools assist the user when developing XPP applications. The tools include a placer and router (xmap), a cycle accurate simulator (xsim) and a visualizer (xvis) [2]. In NML each configuration is defined as a structure of interconnections and PE operations. NML supports primitives to program the configuration manager (CM). The CM is responsible for loading the configurations from one external memory to the local cache and for configuring the array. xmap generates, from NML, the configuration data and the binary code to program the CM. The tool uses a force-based scheme to place the PEs used in the NML description. It can place and route complex examples in few seconds. To hide the user from architecture details and to drastically shorten the time to program complex applications, a C compiler has been a focus of research and development and is presented in the next section.
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